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Synopsys, Inc.
SNPS, a global leader providing software, IP and services used to accelerate
innovation in chips and electronic systems, today announced its DFTMAX™ Ultra
product, part of Synopsys' synthesis-based test solution, that significantly
reduces silicon test cost. Embedded in Design Compiler® RTL synthesis and
incorporating recently unveiled test technology, DFTMAX Ultra delivers up to
3x higher compression, enables testing of several die in parallel and utilizes
the maximum performance of tester equipment to minimize silicon test time. To
meet the need to increase quality and further reduce test cost without
adversely impacting design goals and schedules, designers are deploying DFTMAX
Ultra and realizing its benefits. Several users will share their experiences
on both DFTMAX Ultra and the newly announced DesignWare® STAR Hierarchical
System at the 21^st Annual Synopsys Test Special Interest Group meeting in
Anaheim, California on September 9, 2013.
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